Timer is an 8 bit register that keeps on increasing its value, so one of
the basic conditions is the situation when timer register OVERFLOWS i.e. it has
counted up to its maximum value (255 for 8 BIT timers) and rolled back to 0. In
this situation timer can issue an interrupt and you must write an Interrupt
Service Routine (ISR) to handle the event. There are three different timers
available in Atmega16 and all the timers work in almost same way. They are
TIMER0, TIMER1 and TIMER2.
Prescalar
The Prescalar is a mechanism for generating clock for timer by
CPU clock.
Atmega has clocks of several frequencies such as 1 MHz, 8 MHz,
12 MHz, 16 MHz (max). The Prescalar is used to divide this clock frequency and
produce a clock for TIMER. The Prescalarcan be set to produce the following
types of clocks:
No Clock(Timer stop)
No prescaling (clock frequency
= CPU frequency) FCPU/8
FCPU/64
FCPU/256
FCPU/1024
External clock
Timer Mode
Timers are usually used in one of the following modes:
CTC
Fast PWM
Phase correct PWM
Normal Mode
A timer running in normal mode will count up to its maximum
value. When it reaches this maximum value, it issues an Overflow interrupt and
resets the value of the timer to its original value.
In the above case, you can see that the time period is 256
times the time period of the clock. 255 clock cycles are required to attain the
maximum value and one clock cycle to clear the timer value.
So, ftimer = fclock / 256
this mode has its limitations. We are confined to a very small
set of values of frequency for the timer. This limitation is overcome by the
compare mode.
CTC Mode
(clear timer on compare
match)
Compare mode makes use of a register known as the Output
Compare Register which stores a value of our choice. The timer continuously
compares its current value with the value on the register and when the two
values match, the timer resets itself to 0.
In that case, the output pin will remain high for one time
period of the timer and will remain low for another time period.
So,
tout = 2 * ttimer
From the normal case, we can draw an analogy to find out
ttimer.
ttimer = tclock * (OCR + 1)
So, finally, we have the frequency as,
fout = fclock / (2 * (OCR + 1) )
Pulse Width Modulation (PWM) Mode
if you want to control the brightness of an LED (or any lamp),
or the speed of DC motor, then digital on/off signals will not suffice. This
situation is very smartly handled by a technique called as PWM or Pulse Width
Modulation.
PWM is the technique used to generate analog signals from a
digital device like a MCU.
In AVR microcontrollers, PWM signals are generated by timers.
There are two methods by which you can generate PWM from timers:
1. Fast PWM
2. Phase Correct PWM
1. Fast PWM
Now for PWM generation from this count sequence OCR0 (Output
Compare Register Zero) is used (Zero because it is for TIMER0 and there are
more of these for TIMER1 & TIMER2). We can store any value between 0‐255 in OCR0, say we store
64 in
OCR0 then it would appear in the graph as follows (the RED line).
When the
TIMER0 is configured for fast PWM mode, then, while the timer is counting up,
whenever the value of TIMER0 counter matches the value in the OCR0 register, an
output PIN is pulled low (0) and when counting sequence begin again from 0 it
is SET again (pulled high=VCC). This PIN is named OC0 and you can find it in
the PIN configuration of ATmega
From the figure, you can see that a wave of duty cycle of
64/256 = 25% is produced by setting OCR0 to 64. You can set OCR0 to any value
and get a PWM of duty cycle of (OCR0 / 256). When you set it to 0 you get a 0%
duty cycle while setting it to 255 will give you a 100% duty cycle output. Thus
by varying duty cycle you can get an analog voltage output from the OC0 PIN.
In the inverting
mode the value of the OC0 pin is just the reverse of that in the above figure.
2.
Phase Correct PWM Mode
This mode is very similar to the Fast PWM mode except that
whenever the value of the timer reaches its maximum value then instead of
clearing the value of the timer it simply starts counting down.
Overview of timers
SETTING TIMERS IN CVAVR :
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Data Logger, Digital Timer
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